【发布时间】:2011-08-10 19:56:16
【问题描述】:
我正在尝试用 VHDL 编写两个封装函数,平均两个和四个 8 位 std_logic_vector 输入信号。当我实现以下 avgtwo 代码时,我得到的答案比我的模拟中预期的大 2 倍。这就像返回操作'sum(sum'high downto 1)'没有取sum的高8位......我错过了什么?
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.STD_LOGIC_UNSIGNED.all;
use IEEE.NUMERIC_STD.ALL;
package my_package is
function avgtwo(v1, v2 : std_logic_vector) return std_logic_vector;
function avgfour(v1, v2, v3, v4 : std_logic_vector) return std_logic_vector;
end my_package;
package body my_package is
function avgtwo
(
v1, v2 : std_logic_vector
)
return std_logic_vector is
variable sum : std_logic_vector(v1'high+1 downto 0) := (others => '0');
begin
sum := std_logic_vector(unsigned(v1)) + std_logic_vector(unsigned(v2));
return sum(sum'high downto 1);
end function avgtwo;
function avgfour
(
v1, v2, v3, v4 : std_logic_vector
)
return std_logic_vector is
variable sum : std_logic_vector(v1'high+2 downto 0) := (others => '0');
begin
sum := std_logic_vector(unsigned(v1)) + std_logic_vector(unsigned(v2)) + std_logic_vector(unsigned(v3)) + std_logic_vector(unsigned(v4));
return sum(sum'high downto 2);
end function avgfour;
end my_package;
【问题讨论】: