使用带端口映射的去抖动在 VHDL 中设计 FSM

Question

我用 VHDL 制作了我的 FSM，现在我想使用带有端口映射的去抖动代码。 虽然我对协会有困难。事实上，我想在驱动 FSM 的信号中插入 debouncebutton 分量。

entity myFSM is
    Port ( CLK : in  STD_LOGIC;
           RST : in  STD_LOGIC;
           IN0 : in  STD_LOGIC;
           IN1 : in  STD_LOGIC;
           IN2 : in  STD_LOGIC;
           LED : out  STD_LOGIC_VECTOR (7 downto 0));
end myFSM;

architecture Behavioral of myFSM is
        type state is (A, B, C);
        signal currentS, nextS: state;

        component debouncebutton
            Port ( clk      : in std_logic;     -- connect it to the Clock of the board
           rst      : in std_logic;     -- connect it to the Reset Button of the board          
           input    : in std_logic;     -- connect it to the Push Button of the board
           output   : out std_logic     -- connect it to your circuit
          );
        end component;
begin
myFSM_comb: process (currentS, IN0, IN1, IN2)
begin
    case currentS is
        when A =>   LED <= "11111111";
                        if IN0 = '1' then nextS<=B;
                        elsif IN1 = '1' then nextS<=C;
                        else            nextS<=A;
                        end if;
        when B =>   LED <= "11000011";
                        if IN0 = '1' then nextS<=C;
                        elsif IN1 = '1' then nextS<=A;
                        else nextS<=B;
                        end if;
        when C =>   LED <= "00111100";
                        if IN0 = '1' then nextS<=A;
                        elsif IN1 = '1' then nextS<=B;
                        else nextS<=C;
                        end if;
    end case;
end process;

myFSM_synch: process(CLK,RST)
begin 
    if (RST='1')        then    currentS<=A;
    elsif (rising_edge(CLK)) then currentS<= nextS;
    end if;
end process ;

begin 

db0 : debounce
port map
(
    clk => CLK,
    rst => RST,
    input => IN0,
    output
end Behavioral;

Answer 1

我通过在端口声明中将 IN0 重命名为 INP0 来标记您的代码，在架构中声明了一个名为 INO 的信号以防止更改名称的每次出现，删除了无关的 begin 并将实例化的组件从debounce 到 debouncebutton 以匹配组件声明：

library ieee;
use ieee.std_logic_1164.all;

entity myFSM is
    Port ( CLK : in  STD_LOGIC;
           RST : in  STD_LOGIC;
           INP0 : in  STD_LOGIC;  -- name changed
           IN1 : in  STD_LOGIC;
           IN2 : in  STD_LOGIC;
           LED : out  STD_LOGIC_VECTOR (7 downto 0));
end myFSM;

architecture Behavioral of myFSM is
        type state is (A, B, C);
        signal currentS, nextS: state;

        component debouncebutton
            Port ( clk      : in std_logic;     -- connect it to the Clock of the board
           rst      : in std_logic;     -- connect it to the Reset Button of the board          
           input    : in std_logic;     -- connect it to the Push Button of the board
           output   : out std_logic     -- connect it to your circuit
          );
        end component;

        signal IN0: std_logic;  --- added
begin
myFSM_comb: process (currentS, IN0, IN1, IN2)
begin
    case currentS is
        when A =>   LED <= "11111111";
                        if IN0 = '1' then nextS<=B;
                        elsif IN1 = '1' then nextS<=C;
                        else            nextS<=A;
                        end if;
        when B =>   LED <= "11000011";
                        if IN0 = '1' then nextS<=C;
                        elsif IN1 = '1' then nextS<=A;
                        else nextS<=B;
                        end if;
        when C =>   LED <= "00111100";
                        if IN0 = '1' then nextS<=A;
                        elsif IN1 = '1' then nextS<=B;
                        else nextS<=C;
                        end if;
    end case;
end process;

myFSM_synch: process(CLK,RST)
begin 
    if (RST='1')        then    currentS<=A;
    elsif (rising_edge(CLK)) then currentS<= nextS;
    end if;
end process ;

-- begin  -- syntax error you have a begin before process myFSB_comb

db0 : debouncebutton  --- was debounce, needs to match component declaration
port map (
        clk => CLK,
        rst => RST,
        input => INP0,  -- renamed input port
        output=> IN0   --  newly declared signal INO
    );

end Behavioral;

这允许新输入端口INP0 与debouncebutton 上的正式input 相关联，并将正式output 连接到新声明的信号IN0。

除了 myFSM 的端口声明之外，您还可以简单地为 output 关联声明一个新信号并更改名称 IN0 的实例。

您在上面修改过的代码进行了分析。如果不为 debouncebutton 创建实体/架构对，就无法详细说明（或模拟）。