错误：[VRFC 10-3353] 正式端口 'i0' 没有实际值或默认值

Question

我正在用下面的测试平台、代码和组件制作一个简单的 2 位比较器。

我在运行模拟时不断出错 错误：[VRFC 10-3353] 正式端口“i0”没有实际值或默认值。

对我来说，它的代码和逻辑似乎很好。我认为唯一的问题是嵌套的 for 循环，因为我还不习惯使用它们。

我正在使用vivado 2020.2

测试台

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;

entity Comparator_2bit_tb is
--  Port ( );
end Comparator_2bit_tb;

architecture Behavioral of Comparator_2bit_tb is
--component instantiation
component Comparator_2bit 
    Port ( a : in STD_LOGIC_VECTOR (1 downto 0);
           b : in STD_LOGIC_VECTOR (1 downto 0);
           eqtot : out STD_LOGIC);
end component Comparator_2bit;


--signal declaration
signal a, b : std_logic_vector (1 downto 0);
signal eqtot : std_logic;

begin
--component instantiation
uut: Comparator_2bit
port map (a => a, b => b, eqtot => eqtot);

--Test vector generation
test: process
begin
    for i in 0 to 3 loop
        for u in 0 to 3 loop
        a <= STD_LOGIC_VECTOR(to_unsigned(i, 2));
        b <= STD_LOGIC_VECTOR(to_unsigned(u, 2));
        wait for 10ns;
        end loop;
    end loop;
    wait;
end process test;
end Behavioral;

设计

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity Comparator_2bit is
    Port ( a : in STD_LOGIC_VECTOR (1 downto 0);
           b : in STD_LOGIC_VECTOR (1 downto 0);
           eqtot : out STD_LOGIC);
end Comparator_2bit;

architecture Behavioral of Comparator_2bit is
--component declaration
component Comparator_component
Port (  i0 : in STD_LOGIC;
        i1 : in STD_LOGIC;
        z : out STD_LOGIC);     
end component Comparator_component;

--internal signals
signal eq0, eq1: std_logic;

begin
--component instantiation
bit_0: Comparator_component
port map ( a(0) => i0, b(0) => i1, z => eq0);

bit_1: Comparator_component
port map ( a(1) => i0, b(1) => i1, z => eq1);

eqtot <= (eq0 and eq1);

end Behavioral;

组件

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity Comparator_component is
    Port ( i0 : in STD_LOGIC;
           i1 : in STD_LOGIC;
           z : out STD_LOGIC);
end Comparator_component;

architecture Behavioral of Comparator_component is

begin 
z <= (i0 XNOR i1); -- A eq B  
end Behavioral;

Answer 1

该错误是因为您的端口映射方式错误。对于端口映射，您需要映射：

inst : some_component
port map (
  component_port => local_signal_or_port

您已切换这些值。