【发布时间】:2019-04-16 10:03:58
【问题描述】:
我发现此代码用于 12 位二进制到 bcd 的转换,但我似乎无法理解移位寄存器部分(仅显示状态机部分)。我需要帮助来了解“&”在移位寄存器中的工作原理,以及是否有人也可以为移位寄存器部分生成不同的方式,使其看起来像下面的代码,因为它更容易理解数据流:
ishiftRegister(7) <= Rxd;
ishiftRegister(6 downto 0) <= iShiftRegister(7 downto 1);
-- State Machine
process(present_state, binary, binary_in, bcd_temp, bcds_reg, shift_counter)
begin
next_state <= present_state;
bcds_next <= bcd_temp;
binary_next <= binary;
shift_counter_next <= shift_counter;
case present_state is
when st_start =>
next_state <= st_shift;
binary_next <= binary_in;
bcds_next <= (others => '0');
shift_counter_next <= 0;
when st_shift =>
if shift_counter = 12 then
next_state <= st_stop;
else
binary_next <= binary(10 downto 0) & 'L';
bcds_next <= bcds_reg(18 downto 0) & binary(11);
shift_counter_next <= shift_counter + 1;
end if;
when st_stop=>
next_state <= st_start;
end case;
end process;
【问题讨论】:
标签: binary vhdl data-conversion bcd