quit -sim set PATH1 C:/modeltech64_10.2c/xilinx144_lib set PATH2 C:/xilinx1/Vivado/2014.4/data/verilog/src vlib work #vmap work $PATH1/secureip #vmap work $PATH1/unisim #vmap work $PATH1/unimacro #vmap work $PATH1/unifast #vmap work $PATH1/unisims_ver #vmap work $PATH1/unimacro_ver #vmap work $PATH1/unifast_ver vmap work $PATH1/simprims_ver vlog $PATH2/*.v vlog -work work -f verilog.f vcom -work work -f vhdl.f vsim -novopt work.sim_tb_top run 10000ns q
vsim -do sim.do